Название: CAD for Hardware Security
Автор: Farimah Farahmandi, M. Sazadur Rahman, Sree Ranjani Rajendran
Издательство: Springer
Год: 2023
Страниц: 415
Язык: английский
Формат: pdf (true)
Размер: 17.7 MB

This book provides an overview of current hardware security problems and highlights how these issues can be efficiently addressed using computer-aided design (CAD) tools. Authors are from CAD developers, IP developers, SOC designers as well as SoC verification experts. Readers will gain a comprehensive understanding of SoC security vulnerabilities and how to overcome them, through an efficient combination of proactive countermeasures and a wide variety of CAD solutions.

Emerging hardware security vulnerabilities are menacing since it is almost impossible to amend the design after fabrication. Recent studies reported vulnerabilities, including side-channel leakage, information leakage, access control violations, malicious functionality, etc. Software-level security mechanisms can easily bypass these attacks and put the devices or systems at risk. Increased design complexity, aggressive time to markets, and exotic hardware attacks portent the security of hardware designs. Ensuring the security of system-on-chip (SoC) in terms of trustworthiness, privacy, and reliability is exacting for its wide usage. However, there is a lack of automation in the existing techniques, and they rely on manual approaches that are neither efficient nor scalable for complex designs. The semiconductor industries are looking for automatic computer-aided design (CAD) tools for design verification, and validation efficiently increases the design accuracy with minimal testing time. The hardware engineers examine the security features by utilizing the CAD tools to aid analysis, identifying, root-causing, and mitigating SoC security problems to ensure the trustworthiness of the design.

This book attempts to cover the utilization of CAD tools in hardware security. Whereas vulnerabilities in SoCs arise due to design mistakes, lack of security understanding, design transformations, various attack surfaces, and malicious intents. Further, existing CAD tools used in SoC design flow can unintentionally introduce additional vulnerabilities in the SoCs. Considering the above challenges and potential solutions, the scope of this book presents a comprehensive summary of hardware security defenses, describes the fundamentals of CAD tool usage, and highlights the significant research results. The book systematizes the knowledge of CAD tools used in hardware security and elaborates on its imperative features. The book contains 18 chapters and an appendix on VLSI testing. Each chapter has been planned to emphasize the utilization of CAD tools in the domain of hardware security. We anticipate that this book will provide comprehensive knowledge to graduate students, researchers, and professionals in SoC design and CAD tool development.

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