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RISC-V System-on-Chip Design

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  • Дата: 10-09-2026, 02:26
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Название: RISC-V System-on-Chip Design
Автор: David Harris, James Stine, Sarah Harris, Rose Thompson
Издательство: Morgan Kaufmann/Elsevier
Год: 2027
Страниц: 1115
Язык: английский
Формат: pdf (true)
Размер: 54.7 MB

RISC-V System-On-Chip Design fits at the nexus of computer architecture, microarchitecture, and chip design. It is written to be accessible to an advanced undergraduate audience with limited background. It explains concepts from operating systems, VLSI, and memory systems as necessary, and high school mathematics is sufficient preparation for most of the book, although the floating point and division chapters will be primarily of interest to those with a curiosity about computer arithmetic. Like Harris and Harris’s Digital Design and Computer Architecture textbooks, this book will appeal to students with easy-to-read and complete explanations, sidebars, and occasional humor and cartoons.

It comes with an open-source implementation and will include end-of-chapter problems to extend the RISC-V processor in various ways. Ancillary materials include a GitHub repository with complete open-source SystemVerilog code, validation code in C and assembly language, and code for benchmarking and booting Linux.

Ancillary materials include a GitHub repository with complete open-source SystemVerilog code for the fully-functional Wally RISC-V SoC, validation code in C and assembly language, code for benchmarking and booting Linux, labs, slides, exercises, and figures.

Key features:

Includes a concrete application & implementation of the open RISC-V architecture
Explores rarely taught microarchitectural issues:
Pipelines, buses, caches, branch prediction, virtual memory, floating-point, cryptography & peripherals
Illustrates system design with CORE-V Wally, a fully functional RISC-V system-on-chip:
Programming & debugging RISC-V in C & assembly
SystemVerilog design, debug, verification & synthesis
Benchmarking
Booting Linux on a simulator & FPGA
Provides complete open-source code: github.com/openhwgroup/cvw

Readership:
Senior-level elective or graduate courses in the field of computer processor design in most electrical or computer engineering or CS programs.

This book is intended for a graduate or advanced undergraduate course or for self-study. It assumes that you have had introductory courses on digital design and computer architecture at the level of Digital Design and Computer Architecture: RISC-V Edition or Computer Organization and Design: RISC-V Edition. Specifically, you should be comfortable reading and writing C, assembly language, and Verilog and working in a Linux environment. You may get even more out of this book if you’ve taken a second course at the level of Computer Architecture: A Quantitative Approach or studied operating systems, compilers, field programmable gate arrays (FPGAs), or chip design.

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